Position Overview For our client, we are seeking a 3DIC Physical Design Engineer to work on cutting-edge 3D integration technologies, driving innovation in next-generation semiconductor systems.
Your Role As a 3DIC Physical Design Engineer, you’ll develop and implement physical design strategies for complex multi-die systems. You’ll help shape the next generation of high-performance, low-power chip architectures.
Design high-speed clock buses across dies to meet strict PPA (Power, Performance, Area) targets
Contribute to floorplanning, interconnect, power delivery, and thermal design in 2.5D/3DIC systems
Define and apply signoff methodologies for multi-die integration
Support STCO/DTCO initiatives to co-optimize architecture and technology
Collaborate with experts across architecture, design, packaging, and fabrication
What We’re Looking For Technical Expertise
Proven experience in back-end physical implementation, with large-scale chip design and verification (RTL2GDS)
Solid understanding of physical design flows, EDA tools (e.g. Cadence, Synopsys), and timing closure techniques
Hands‑on experience with high-speed bus planning, 3DIC or Chiplet designs
Familiarity with advanced semiconductor processes (e.g. FinFET, 7nm/5nm), including design rules and process constraints
Knowledge of reliability, power integrity, and thermal management in multi-die systems
Experience translating system/product requirements into chip architecture and floorplan strategies
Qualifications
Master’s degree or PhD in Electronics, Computer Engineering, Physics, Materials Science, or related field
5–10 years of relevant industry experience
Contact Antal International Paris London
www.antal.com/recruitment/france-paris-bsc
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