Analog Layout Engineer
Design and Develop Complex Analog IP Blocks
Key Responsibilities
* Design custom analog layouts for various projects, including PLL, Bandgap References (BG), LVDS, and IVREF.
* Conduct CHIP-level validations, including post-dummy fill and tape-out signoff checks.
* Ensure timely delivery of layout blocks and project deliverables to meet critical deadlines.
* Compile design reports and complete formal checklists at project closure.
Required Skills and Qualifications
* Proven experience with analog layout design and top-level integration.
* Proficiency in EDA tools used for layout and verification.
* Solid understanding of Layout Dependent Effects (LDEs) and deep submicron technology nodes.
* Detail-oriented mindset with ability to work independently and collaboratively.
* Willingness to travel regularly for subcontractor visits.