ASIC Designers & Verification Engineers – Cache Coherency, CHI (Coherent Hub interface)
Long term fully remote B2B contract/freelance opportunities for ASIC Designers and Verification Engineers with Cache Coherency experience to join our leading client in the semiconductor industry. Our client is developing a new, cutting edge AI Chip.
The role of the Designers and Verification Engineers will be to improve the speed and efficiency of our clients existing test bench.
To be successful in this role you must be a proven ASIC Designer or Verification Engineer with previous experience in Cache Coherency. Our client is using the Arm AMBA CHI (Coherent Hub interface) protocol for their Cache Coherency, so any experience with this specific protocol is highly advantageous, but not essential.
These are fully remote, very long term contracts.
Please apply immediately if this sounds like the next role for you!
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