Digital Verification Engineer – Leuven, Belgium – 6 MonthsLocation: Leuven (minimum 3 days onsite)Contract Type: FreelanceStart: ASAPDuration: 6 months
OverviewOur client in Belgium is seeking a Senior Digital Verification Engineer to support a new product development team. The successful candidate will play a key role in digital IC hardware verification, ensuring high-quality and reliable silicon delivery for high-volume products.
Key ResponsibilitiesOwn verification activities for digital blocks, subsystems, or top-level functionsDefine and detail verification specifications and test casesDevelop and implement test cases using SystemVerilog, UVM, Python, and assertion-based verificationOptimize verification coverage while maintaining efficient execution timeMaintain and execute regression test suitesParticipate in peer reviews and technical discussionsCollaborate with architects and cross-functional teams (Analog, Firmware, Layout) to resolve design issues and ensure overall product success
Required Skills & Experience5–10 years of experience in digital IC design and/or verificationStrong expertise in UVM, SystemVerilog, and assertion-based verificationProven experience delivering working silicon for high-volume productionFamiliarity with Cadence EDA simulation tools and Synopsys SpyglassExperience with VHDL, Verilog, and Python is preferredKnowledge of low-power design techniques (nice to have)Experience in audio processing and/or AI accelerators is an advantageFluent in English