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Senior 3dic physical design engineer

Antal International Network
Design
Publiée le 24 octobre
Description de l'offre

For our client, we are seeking a 3DIC Physical Design Engineer to work on cutting-edge 3D integration technologies, driving innovation in next-generation semiconductor systems.We’re hiring on behalf of a leading global research center pioneering the future of chip integration.Join an international R&D team working at the edge of semiconductor innovation: 2.5D/3DIC design, Chiplet integration, and advanced physical implementation flows.Your RoleAs a 3DIC Physical Design Engineer, you’ll develop and implement physical design strategies for complex multi-die systems. You’ll help shape the next generation of high-performance, low-power chip architectures.You will:Design high-speed clock buses across dies to meet strict PPA (Power, Performance, Area) targetsContribute to floorplanning, interconnect, power delivery, and thermal design in 2.5D/3DIC systemsDefine and apply signoff methodologies for multi-die integrationSupport STCO/DTCO initiatives to co-optimize architecture and technologyCollaborate with experts across architecture, design, packaging, and fabricationWhat We’re Looking ForTechnical Expertise:Proven experience in back-end physical implementation, with large-scale chip design and verification (RTL2GDS)Solid understanding of physical design flows, EDA tools (e.g. Cadence, Synopsys), and timing closure techniquesHands-on experience with high-speed bus planning, 3DIC or Chiplet designsFamiliarity with advanced semiconductor processes (e.g. FinFET, 7nm/5nm), including design rules and process constraintsKnowledge of reliability, power integrity, and thermal management in multi-die systemsExperience translating system/product requirements into chip architecture and floorplan strategiesQualifications:Master’s degree or PhD in Electronics, Computer Engineering, Physics, Materials Science, or related field5–10 years of relevant industry experienceBe part of a team redefining how the most advanced chips are physically built.ContactPhilippe BILDÉAntal International Paris LondonPhilippe.Bilde@antal.comwww.antal.com/recruitment/france-paris-bscDo you have hands-on experience with physical design implementation for 3DIC or Chiplet-based multi-die systems? Yes No
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