As a Sr Digital Design Engineer you’re responsible for the design, verification and documentation of control and signal processing modules for state‑of‑the‑art CMOS image sensors. During the design cycle you will be working in close collaboration with mixed‑signal design engineers, perform verification tasks and support the physical integration teams with synthesis, DFT, placement and timing closure related challenges. During sensor characterization and validation you’ll get the opportunity to work hands‑on with the processed silicon in the lab.
Responsibilities
Image sensor control and processing function design and verification
High speed interface (LVDS/MIPI/... ) design and verification
Full‑chip integration, logic synthesis, Logic Equivalence Check (LEC), Static Timing Analysis (STA), Power Analysis and Gate Level Simulation
Chip bring‑up, validation, and debugging
Participate in the FPGA development
Architecture, registers, interface and design documentation
Test Insertion (scan, MBIST, ... )
Qualifications
MS degree in Electrical Engineering with at least 4 years of relevant experience in digital design and verification
Good knowledge with working experience of design flow, including RTL coding, verification, synthesis, static timing analysis and equivalence check
Knowledge of or experience with any of the following topics is a plus:
DFT techniques
mixed‑signal design
high performance and low power design techniques
FPGA and emulation platforms (for design validation)
SoC architectures
assertion‑based formal verification and/or UVM
Functional Safety concepts
Excellent command of English as working language
#J-18808-Ljbffr