Chipright are seeking an Experienced analog designer with radiation hardened SRAM blocks design experience
Job description
You will participate in the activities of a team of analog, library and memory designers and analog layout engineers.
Responsibilities:
1. Perform transistor level SRAM memory cell plus block design and layout from specification to documentation according to the imec rad-hard development flow
2. Report regularly your design and layout progress of the memory development.
3. Document your results and present them clearly in review meetings to other analog design engineers
Requirements:
4. Good understanding of CMOS technologies as well as several years of experience with the analog design flow including schematic design, simulation with parasitics and full custom layout
5. A high level of efficient use of Cadence design tools is a must, as well as experience with Calibre tools for physical verification
6. Strong experience with SRAM design is highly preferred
7. Experience with TSMC 65nm is highly preferred
8. Knowledge of memory compiler implementation is a plus
9. Knowledge of radiation effects on semiconductors and mitigation techniques is beneficial
10. Fluent English, both written and spoken
Chipright –