1 day ago Be among the first 25 applicants
Get AI-powered advice on this job and more exclusive features.
Direct message the job poster from Astrape Networks
This position is based in Schelle, Belgium, with the possibility of limited hybrid work. Applicants must have the legal right to work at the indicated location at the time of application. Visa sponsorship or work permit support will not be provided.
Role Overview
As senior FPGA engineer, you will contribute to the development of key components of our networking system, including SmartNICs and hybrid optical switches. You will be responsible for designing and optimizing VHDL and/or Verilog implementations. In the next phase, you will verify your designs in simulation by writing test cases and scenario’s within our Python simulation environment. You will integrate your designs and IP cores into our FPGA projects. Next to this, timing analysis and on-target verification arekey responsibilities of this role.
Finally, you will participate in the system level performance testing and debug fixing in close collaboration with the software and networking team.
Requirements
Must-have:
* Master’s degree in electronics engineering, or similar by experience.
* Strong knowledge of VHDL and Verilog development.
* Programming skills in Tcl and Python.
* Experience in timing analysis and closure.
* Experience with unit simulation testing and test automation (Jenkins).
* Familiar with working in a Linux environment.
* Understanding of networking concepts (Ethernet, TCP/IP, MAC addressing, buffering, etc.).
* Strong problem-solving and debugging skills.
* Eagerness to familiarize yourself with new and cutting-edge technologies.
Nice-to-have
* Familiar with Xilinx FPGA tools and QuestaSim/ModelSim.
* Experience working with Cocotb verification environment.
* Knowledge of high-speed interfaces: DDR4, Ethernet, PCIe, AXI4, AXI-lite.
Why Join Us?
At Astrape Networks, you will work on cutting-edge FPGA-based networking solutions for AI-driven data centers. Join a fast-growing deep-tech team, collaborate with industry experts and directly impact the future of high-speed networking and data processing. If you seek innovation, career growth and exciting challenges, this is the place for you.
Seniority level
* Seniority level
Mid-Senior level
Employment type
* Employment type
Full-time
Job function
* Job function
Engineering and Information Technology
* Industries
Telecommunications
Referrals increase your chances of interviewing at Astrape Networks by 2x
Sign in to set job alerts for “Field-Programmable Gate Arrays Engineer” roles.
We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
#J-18808-Ljbffr