Beschrijving van het bedrijf
The MICAS division of the Department of Electrical Engineering (ESAT) at KU Leuven is an international leader in integrated circuits, edge AI hardware, and intelligent energy-efficient systems. MICAS conducts research across the full stack of edge intelligence, ranging from algorithms and mapping methodologies to hardware architectures and silicon demonstrators. The group collaborates closely with semiconductor companies, technology providers, and research institutes worldwide. The group has successfully spun out 7 startups.
Within MICAS, this position is situated on design space exploration for deep learning and AI accelerators. This work focuses on tools and methodologies that enable fast exploration of accelerator architectures, dataflows, mappings, memory hierarchies, and workload scheduling, with the goal of guiding both hardware design and software deployment decisions for efficient edge AI systems.
We are looking for a highly motivated engineer to strengthen this activity and help connect KU Leuven's design space exploration frameworks to emerging AI accelerator backends from industrial partners towards a spin-off startup. The position is hosted at KU Leuven. Depending on project evolution and mutual fit, there is potential for continuation in the incubating spin-off activity connected to this work. More information on that broader valorization trajectory can be discussed and read about at https://phoenics.ai.
Beschrijving van de functie
- You develop interfaces between KU Leuven's design space exploration software and commercial compiler backends for new AI accelerator architectures from partner companies.
- You help extend the design space exploration framework towards new hardware architectures, memory systems, dataflows, and execution models.
- You improve the current software stack in terms of runtime, modularity, framework orchestration, usability, and automation.
- You contribute to automated workflows that connect model description, mapping exploration, compiler lowering, and hardware cost estimation.
- You help evaluate and validate new flows on representative AI workloads and accelerator targets.
- You collaborate closely with PhD researchers, postdoctoral researchers, and industrial partners, and contribute to technical documentation and dissemination of the developed flows.
- Depending on your profile, you may contribute to prototype deployment, hardware validation, or supervision of student projects.
Jouw profiel
Required
- You hold a master's degree in Engineering Science, Engineering Technology, Computer Science, Informatics, or an equivalent field.
- You have a strong interest in compiler flows, AI acceleration, and system-level optimization.
- You have solid programming experience in Python.
- You have experience with embedded software development in C and/or C .
- You are familiar with compiler infrastructures and intermediate representations such as LLVM, MLIR, or related frameworks.
Bonus
- Experience with Rust is a plus.
- Experience with design space exploration tools, analytical performance modeling, or mapping/scheduling frameworks is a plus.
- Experience with AI accelerator architectures, dataflow architectures, or hardware/software co-design is a plus.
- Hands-on experience with embedded hardware, FPGA-based prototyping, RTL simulation, or hardware verification is a plus.
- Experience with software engineering practices such as testing, CI, packaging, version control, and modular framework development is a strong asset.
- Familiarity with ML model deployment flows, quantization, graph compilers, ONNX, TVM, IREE, or similar infrastructures is a plus.
- You are a team player who can work in a multidisciplinary environment spanning software, compilers, and hardware architecture.
- You have good communication skills and a strong command of spoken and written English.
Taalvaardigheden
- Engels (troef)
- Begrijpen : Vaardig - (C1)
- Schrijven : Vaardig - (C1)
- Lezen : Vaardig - (C1)
- Spreken : Vaardig - (C1)