We have had a great opportunity for a Senior Digital Design Verification Engineer in Belgium.
Job Title: Senior Digital Design Verification Engineer
Location: Leuven, Belgium – minimum 3 days in office
Type: Freelancer | 100% FTE (40 hours/week)
5–10 years’ experience in digital IC design/verification
We are building a new product development team in Leuven and seek a skilled engineer in digital IC hardware verification. The role involves verifying blocks, subsystems, or top-level functions, developing testbenches, and collaborating with cross-functional teams to ensure product success.
Develop and implement testcases using SystemVerilog, UVM, Python, and assertions
Participate in design reviews, peer reviews, and root-cause analysis
Collaborate with other teams (Analog, Firmware, Layout)
Master’s in Electronic/Electrical Engineering
Knowledge of low-power design techniques; Familiar with Cadence EDA tools, Synopsys Spyglass, VHDL/Verilog/SystemVerilog, Python
Team player with excellent communication; fluent in English