Mixed-Signal System Architect for Technology Demonstrators
In this position, you will be part of the imec department leading pathfinding and development of next generation technologies, looking at the most advanced devices and systems. As Test Chip architect, you will be responsible with your team for the design of relevant demonstrators for technology pathfinding, with strong focus on new memories, including embedded DRAMs, ferroelectric RAMs, 3D dense memories. This includes the definition and strategy of the test chip for technology assessment, the specifications of relevant test structures, the measurement and characterization strategy, the planning of the tape‑out and the follow‑up of the tape‑out qualifications. The small and agile tape‑out team interacts with the integration and device teams, testing teams, and System/Design‑Technology Co‑Optimization (STCO/DTCO) teams to drive the test chip project to success. You are an agile and positive team player, able to understand requirements from different interfaces. You enjoy people interactions and care for individuals and for common success.
Your activities and responsibilities will include:
* Test chip demonstrator definition and specifications.
* Hands‑on mixed‑signal circuit simulations.
* Measurement and characterization strategy definition.
* Floorplanning and sign‑off, tape‑out verification/qualification.
What we do for you
* A full‑time position in imec Leuven, Belgium or imec Cambridge, UK.
* An exciting position in a rapidly growing, multi‑disciplinary team.
* The chance to interact closely with circuit designers, device experts and process integration engineers.
* High impact and visibility through publications and interactions with imec’s major foundry, fabless and EDA partners.
Who you are
* The ideal candidate will have a Master degree in Electronics with at least 5 years relevant industrial or academic experience in circuit design and tape‑outs.
* You have a mixed‑signal or digital circuit design background and brought your circuit design to hardware as an architect with complex designs (e.g., including multiple power domains, clock domains, and test‑oriented designs).
* You have enabled and carried out a successful tape‑out from concept to design to sign‑off to test.
* You are fluent in circuit design tools, including layout and circuit simulation (Virtuoso IC design, HSPICE, Calibre DRC/LVS, …).
* Project management and/or team leadership experience or interest is a plus.
* You have worked in multi‑disciplinary teams, ideally interacting with hardware designers as well as EDA vendors and foundry partners.
* You have a critical mindset, eager to explore new challenges in the future and evolve together with the changing R&D demands.
* You are an open and constructive team player.
Job details
Title: Mixed‑Signal System Architect for Technology Demonstrators
Location: imec Leuven, Belgium or imec Cambridge, UK
For imec UK: this position is open only to candidates who already hold a valid UK residence permit or work authorization. We are currently not able to provide UK visa sponsorship.
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