Job Title: Digital Validation Engineer Location: Leuven, Belgium
Contract Duration: 6 months
Type: Freelance / Contract
We are looking for an experienced Digital Validation Engineer to support an FPGA-focused project involving design adaptation, implementation, prototyping, and validation. You will work closely with another FPGA expert, with a strong emphasis on prototyping and hands-on validation, including bench-level debugging and timing analysis.
Develop, analyze, and refine FPGA timing constraints in collaboration with the design team.
Write and execute C-based test software for FPGA validation.
Develop Python-based scripts and tools to support testing and validation activities.
Strong digital design expertise using VHDL, Verilog, and/or SystemVerilog.
Strong background in electronics fundamentals and hardware debugging.