Overview
Design Space Exploration of Emerging 3D Stacking Solutions for High-Bandwidth Memory
Location
Leuven
Internship type and duration
Type of internship: Master internship, PhD internship
Duration: 6-9 months
Responsibilities
* Advanced stacking paths that enable faster, cooler, and denser 3D high-bandwidth memory modules; model and evaluate packaging parameters for 3D HBM packaging options, including stack height, TSV density, bonding pitch, cooling and power delivery strategies.
* Develop a systematic design space exploration framework and quantify performance, capacity, energy, and area to inform decisions for next-generation 3D HBM integration in AI accelerators and heterogeneous SoCs.
Required skills and qualifications
* Solid understanding of memory subsystem
* Familiarity with different bit cell concepts and RC delay modeling
* Strong programming skills in C++ or Python
* Experience with performance modelling techniques
* Exposure to system-level simulation tools or benchmarking frameworks is a plus (Ramulator, DRAMSys, DRAMSim, Gem5, …)
Educational background
Required educational background: Computer Science, Electrotechnics/Electrical Engineering, Nanoscience & Nanotechnology
Supervising scientist
For further information or for application, please contact Khakim Akhunov (Khakim.Akhunov@imec.be)
Reference code
The reference code for this position is 2026-INT-044. Mention this reference code in your application.
Compensation
Imec allowance will be provided for students studying at a non-Belgian university.
Applications
Applications should include the following information:
* resume
* motivation
* current study
Incomplete applications will not be considered.
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