HRP GLOBAL TECHNOLOGIES is seeking a Design Verification Engineer to work in Belgium, responsible for developing verification plans and executing design validation. Candidates should have 4 to 12 years of experience and proficiency in SystemVerilog and UVM.
Ready to make your application Please do read through the description at least once before clicking on Apply.
The position requires knowledge of complex SoCs, debugging skills, and effective coordination with cross-functional teams. xphnsxz Strong communication skills are essential for project success.
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